The main application here would be that the RP2040 only has a single XIP QSPI bus. If you extend its memory by hooking up PSRAM to that bus, you can't boot because the chip loads all its code from QSPI. If you hook flash up to that bus, you don't have any way to add extra memory.
FRAM would allow you to have your cake and write it: your application code survives a reboot, and (if the chip were to gain write support) the remaining space could be treated like PSRAM.
i see, that makes a certain amount of sense, thank you. normally you can share a single spi or dual/quad spi bus between multiple peripherals with different /cs lines, but i guess that would be pretty tough to make work for instruction fetches. older chips like the 8086 had a pin to tell the memory system when it was fetching an instruction, but i haven't seen that feature in a long time, not even enabled by a fuse
you can probably use qpi that way (with both psram and flash) if you sacrifice xip and settle for loading overlays? you could even store them on qpi nand
FRAM would allow you to have your cake and write it: your application code survives a reboot, and (if the chip were to gain write support) the remaining space could be treated like PSRAM.